In modem digital radio design, an RF frequency synthesizer is a key block used for both up-conversion and down-conversion of radio signals. Traditionally, it has been based on a charge-pump PLL which is not easily amenable to scaled CMOS integration and suffers from a high level of reference spurs generated by the correlative phase detection method. Use of a digitally-controlled oscillator (DCO) that deliberately avoids any analog tuning controls has been proposed and demonstrated for RF wireless applications. This allows for the loop control circuitry to be implemented in a fully digital manner as a digital-synchronous phase-domain all-digital PLL (ADPLL).